Zynq Ultrascale Reference Manual Courses
Embedded System Design with Xilinx ZYNQ SoC and SDK
Using Xilinx Vivado Design Suite 2019.1 or Lower
Rating: 4.75
Building Custom AXI Interface Peripherals for ZYNQ Devices
All about AXI Slave Lite and AXI Stream Interface
Rating: 4.4
Embedded System Design with Xilinx Zynq SoC and Vitis IDE
Using Xilinx Vivado Design Suite and Vitis 2020.2
Rating: 4.3
Designing a Processor with Verilog HDL and Xilinx Vivado
Step by Step Guide from Scratch
Rating: 4.15
Xilinx VIVADO Beginner Course for FPGA Development in VHDL
Learn how to Create VHDL Design,Simulation Testbench & Implementation with Xilinx VIVADO & FPGA: from Basic to Advanced.
Rating: 4.1
PYNQ FPGA Development with Python Programming & VIVADO
Learn Python Development with PYNQ FPGA: covers from Image Processing to Acceleration of Face Recognition Projects.
Rating: 3.7
Learn VHDL Design using Xilinx Zynq-7000 ARM/FPGA SoC
For both the beginner and experienced Engineer using Vivado on the Zybo Z7 Xilinx Zynq FPGA Development Board
Rating: 3.65
Embedded System Design with Xilinx Zynq FPGA and VIVADO
Zynq Training with VIVADO Tool: Embedded System Design with Zynq 7000 (Zedboard/Zybo/MicroZed), VIVADO IPI & SDK.
Rating: 3.6
FPGA Design with VIVADO HLS & Vitis HLS-High Level Synthesis
Design, Simulate, Synthesize & Export IP with VIVADO HLS & Vitis HLS : An FPGA Design Approach with C/C++
Rating: 3.3
VIVADO Course Learn from the beginning with PCIE project
FPGA development with Vivado design suite to design Xilinx FPGA FROM ZERO using VHDL or VERILOG language!
Rating: 2.9
Courses By: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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