FPGA Design and VHDL

FPGA Design and VHDL

A course designed to teach the candidate the concepts of digital systems design using FPGAs. The design is taught using a Hardware Description Language (HDL) called as VHDL. The course will discuss in-depth all the components of VHDL and how different language constructs help us in designing hardware. The course will then give the student an option of doing real hardware experiments remotely or perform simulation experiments using the software that is available to download from the internet.

A course designed to teach FPGA design and digital design (basic and intermediate) using VHDL as a language

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What you will learn

• Basics of Digital Design
• Combinational Logic design using VHDL
• Sequential Logic Deign Using VHDL

Rating: 4.6

Level: All Levels

Duration: 7.5 hours

Instructor: Eduvance (Microchip Certified Trainer, AUP Trainer, CUA Trainer)